Toshiba TLP511E Manuel d'utilisateur

FILE NO. 336-9707TECHNICAL TRAINING MANUAL3 LCD DATA PROJECTORPRINTED IN JAPAN, Nov., 1997STLP511UTLP510UTLP511ETLP510E

4-34-2. Operation DescriptionThe video signal of the odd number pixel (even numberpixel) is sent to Q501 (Q503) base and supplied to pin 16of Q502 (Q5

4-4Table 4-2-2 Input terminal function descriptionNameDXCLX, CLXDIRX, DIRXENB1 – ENB2VID1 – VID12DYCLY, CLYDIRY, DIRYLCCOMVDDXVDDYVSSXVSSYNRGNRS1 – N

5-15. MICROPROCESSOR5-1. System OutlineThe system microprocessor has features as shown below.In considering easy maintenance for specificationmodifica

5-2Fig. 5-1-1 System block diagramPL001 PL0012/2/2/3/HC125QL012HC125QL005PL003PL006 QL003PL002HC14QL010HC165PL009DRIVESENSORPQ20VZ1UQL004RN5VD27ACAT2

5-35-2. System MicroprocessorThe system microprocessor QL002 employs an 8 bitmicro-controller (HD64F3337YF16).In this system microprocessor, a program

5-45-3. Power Supply Reset ProcessIn the power supply reset process, power supply reset IC(RN5VD27A), QL004 is employed.The reset IC,QL004, develops t

5-55-8. Status Display ProcessIn the status display process, two-color lighting LEDs ofDL037, DL038 and DL039 turn ON for each kind ofstatus shown in

5-6Table 5-10-1 I2C control for each kind of video system5-10. Video System Control ProcessIn the video system control process, control signals aresu

5-75-12. Drive System Control ProcessIn the drive system control process, the control signal issupplied to each kind of drive system process ICs shown

5-85-14. Applicable SignalVarious kinds of signals are used as the applicablesignals in the preset mode (standard value) as shown inTable 5-14-1. For

i1. MAIN POWER SUPPLYCIRCUIT ...1-11-1. Description ... 1-11-2. Output

5-95-15. RS-232C Control MethodSignals are connected to the RS-232C connector in astraight format as shown in Table 5-15-1 RS-232Cconnection signals.

5-10ItemNormal statusRGBCamera (for TLP511)Common adjustmentVideoCommandPONPOFIN1IN2IN3VUPVDWDONDOFMONMOFAONAOFFONFOFRONROFCFUCFDCZUCZDALFARGAUPADWRST

6-16. DIGITAL CIRCUIT6-1. OutlineA Configuration of digital circuit is shown in Fig. 6-1-1.The functions of digital circuit are described on thefollow

6-26-1-1. PLL CircuitThe PLL circuit develops the clock signal synchronizedwith the horizontal sync signal, using the horizontal syncsignal entered.Fo

6-36-2. Each IC Description6-2-1. PLL IC CXA3106Q (QX028) for RGB SignalsA configuration of CXA3106Q is shown in Fig. 6-2-1.The PLL IC of CXA3106Q is

6-46-2-2. PLL IC TLC2932 (QX029) for Video SignalThe PLL IC of TLC2932 is composed of a phasecomparator and a VCO. As a frequency dividing circuit isn

6-5INVVRTVRM3VRM2VRM1VRB(ECL)(TTL)CLK(ECL)(TTL)NRSETSELECTCLK OUTP2D7(MSB)P2D6P2D5P2D4P2D3P2D2P2D1P2D0P1D7P1D6P1D5P1D4P1D3P1D2P1D1P1D0(LSB)(MSB)(LSB)V

6-66-2-6. Picture Size of View Conversion IC T-FORC(QX204, QX404, QX604)A configuration of T-FORC is shown in Fig. 6-2-5. TheT-FORC is a newly develo

7-17. VIDEO CIRCUIT7-1. Circuit ComponentThe video circuit performs selection of input signals,video signal (NTSC, PAL, SECAM) demodulation toRGB sign

7-2Fig. 7-1-1 Block diagram

1-11. MAIN POWER SUPPLY CIRCUIT1-1. DescriptionThis power supply boosts up at boost-up-converter justafter bridge-rectifying AC input voltage, supplie

7-32526911356343129373913143332QV005TDA9141Y2C2S2LEVREVY3SCLL OUT 1C OUT 1Y OUT 1V OUT 1Y IN 1C IN 1AUDIOMicroprocessorR OUT 1SDAC3LRYS1/S2CYCCAMERASR

7-4Fig. 7-2-2 Internal block diagram of CXA1855Q346 dBVOUT1YIN1YOUT1TRAP16 dB0 dB0 dB0 dB0 dB41TV27EV43V11V27V345Y13Y29Y347C15C211C33137356 dB6 dB6 d

7-57-3. Video Demodulation Block7-3-1. Y/C Separation CircuitThis circuit separates Y and C signals from a compositevideo signal. Fig. 7-3-1 shows the

7-6Serial datainput/outputSerial clockinputHorizontalPLL filterSand castleoutputVertical acquisitionsynchronization pulseClamping pulse/HA sync

7-7SIGNALCLAMPINGSIGNALCLAMPING±(R-Y)±(R-Y)±(B-Y)±(B-Y)Color differenceinput signalsV P1Sand castlepulse inputanalog supplySANDCASTLEDETECTORGN

7-87-3-4. Color Signal Process CircuitThe color signal is level adjusted in the ACC (automaticcolor control) circuit, corrected in passing through aba

7-9Fig. 7-3-9 Block diagram of TDA46727-3-6. RGB DemodulationThe demodulation from Y and color difference signals toRGB signals is carried out by QV0

7-10Table 7-3-4 Terminal function of TDA4780Fig. 7-3-11 Block diagram of TDA4780PinNo.1234567891011121314NameFSW2R2G2B2VP–(B–Y)–(R–Y)YGNDR1G1B1FSW1S

7-11QV001INPUT SELECTORCXA1855QVIDEORGBLINEOUTBUFFERBUFFERDACVOL / MUTESOUND OUTSPEAKER1.5WVOLUMEMUTE L R L R L RCXA1315MQA01 M5222FPQA02 TDA7056A7

7-127-4. RGB Signal Amplification Section7-4-1. RGB Signal Switch CircuitThe RGB input signals and the video signal demodu-lated into RGB signals are

1-21-5. Over-current ProtectionIn S6V and +6V lines, the voltage drop owing to thecurrent flowing in L203 is detected by pins 5 and 6 ofIC401, when th

7-1336 35 34 33 32 31 30 29 28 27 26 25 24 23 22 20 19 181 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18RBRIGHTNESSGBRIGHTNESSBBRIGHTNESSRHOLDRAMPGHOLDGA

7-147-5. Microprocessor InterfaceThe peripheral block diagram of the microprocessorshows in Fig. 7-5-1. All kinds of control such as signalSW, etc. a

7-15QB012 (M52347FP) Input statusPin 6: HD. COMPHD. COMP. (POS.)HD. COMP. (POS.)HD. COMP. (POS.)HD. COMP. (NEG.)HD. COMP. (NEG.)HD. HD. COMP.(NEG.)NON

8-18. CCD CAMERA CIRCUIT(For TLP511)8-1. OutlineThe camera section of the unit employs the color boardcamera with 3 times zoom lens. The camera video

8-2Fig. 8-1-1 CCD camera circuit block diagram

9-19. FLUORESCENT LAMPINVERTER CIRCUIT(For TLP511)9-1. Operating DescriptionThe base current at start-up passes through QI002,RI003, RI004, RI009 and

9-2CI005 and CI006 are capacitors to stabilize the fluores-cent lamp discharging current. After the dischargingstarts, CI005 and CI006 limit the flow

TOSHI B A AMERICA CONSUMER PRODUCTS, INC.NATIONAL SERVICE DIVISION1420-B TOSHIBA DRIVELEBANON, TN 37087

2-12. LAMP POWER SUPPLY CIRCUIT(LAMP DRIVER)2-1. ConfigurationThe lamp power supply cicrcuit receives a DC220 to390V (primary side) from the system po

3-13. OPTICAL SYSTEM3-1. ConfigurationLampunitMirrorboxunitPrismunitProjec-tionlensNo.123456789101112131415NameUHP lampParabolicreflectorUV IR filterM

3-2Fig. 3-1-1 Optical configuration diagramXGA 1.3 inch 3 plates systemB-2-1UHP (120W)A15991188745432161314121313101210109-3-1-2

4-14. R.G.B. DRIVE CIRCUIT4-1. OutlineThe outline of RGB drive circuit is described belowusing the G process of the RGB drive circuit as anexample.Fig

4-21 2 3 4 5 6 7 8 9 10 11 12 PixelInverted phase 2 voltageInverted phase 1 voltageCenter voltage1st line2nd line1 2 3 4 5 6 7 8 9 10 11 12 PixelNorma